hardware intelligence
Hardware Intelligence builds AI chip-design tools: Wave, a terminal waveform debugger, and WaveZip, lossless waveform compression.
hardware intelligence sells two tools to semiconductor design and verification teams. Wave is a waveform debugger that runs entirely in a terminal and includes a verification agent that answers questions about a signal in plain English. WaveZip is a compressed waveform format that records simulation output at a fraction of the size of standard dumps.
Both products are deployed on the customer's own infrastructure and are onboarded through a demo request or a design-partner arrangement rather than a public pricing page. The company reports that Wave reads VCD and FST dumps and that WaveZip is implemented in pure SystemVerilog so it works with compliant simulators. Buyers are chip design, verification, and simulation farm teams at ASIC, FPGA, and SoC companies.
The company addresses electronic design automation, a market the founders size at twenty billion dollars, and specifically the debug and simulation portion of chip verification. Its buyers are semiconductor design teams whose simulation farms generate waveform data at a scale that makes storage and rerun cost a line item. Demand follows chip design activity generally, and AI accelerator and SoC programs have increased verification workloads.
The company competes for the same engineers served by the established EDA vendors' debug tools, and its entry point is a terminal-native workflow aimed at teams using agentic AI tooling. Adoption currently runs through design partners and demo requests rather than self-serve. The two-product approach ties a no-cost-of-entry debugger to a storage product, giving the company two paths into the same account.
The company's stated advantage is speed of access to waveform data. Wave opens a simulation dump in a terminal without the license-server check that the incumbents' graphical debuggers require, and its agent proposes candidate fixes and proves them against the customer's own simulator rather than only describing a suspect signal. The founders argue this shortens the loop between a failing test and a verified change.
WaveZip attacks the storage side of the same workflow: the company reports compression to about one five-hundredth of an FST dump with recording overhead under ten percent, which makes keeping every simulation run practical instead of rerunning a failed job with dumping enabled. Compression is implemented in SystemVerilog inside the design itself, so it does not depend on a specific simulator vendor. Both tools run on the customer's hardware, which the company presents as the deployment model security-conscious semiconductor buyers require.
Hardware Intelligence builds AI chip-design tools: Wave, a terminal waveform debugger, and WaveZip, lossless waveform compression.