Arteris

Automate topology generation, slash wire length and latency, and boost productivity by up to 10x with FlexGen. Ideal for complex SoC and chiplet designs in automotive, AI, and data center applications.

Deliver efficient on-chip communication with low-power, flexible-topology NoC IP tailored for IoT, edge and microcontroller SoCs, reducing die area, wirelength, and integration time.

Cycuity Radix provides systematic hardware security assurance across the chip design lifecycle, from IP blocks and chiplets to SoCs.

Magillem Platform delivers a unified, single-source-of-truth environment to automate IP packaging, connectivity, and hardware/software interface, accelerating SoC development with higher quality.

Today’s complex system-on-chip (SoC) designs can contain between tens to hundreds of IP blocks

The page discusses what enabled humanity to build wonders such as Stonehenge in England.

Today’s system-on-chip (SoC) devices can contain hundreds of millions to over a hundred billion transistors

As Silicon Valley is in the midst of the heat wave the world is experiencing, the recent Design Automation Conference and its exhibition discussed hot technologies.

The page features Arteris News updates on FlexGen, Magillem Registers, and Microcontroller solutions.

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The page features Arteris IP press releases about semiconductor innovations and strategic partnerships.

The company creates IP for chip design teams.

Arteris IP has open positions in engineering, marketing, sales, and other areas.

Antonio J. Viana has served on the company’s board of directors since October 2016 and is chairman and non-executive director of BrainChip, an Australian- and US-based neuromorphic AI processor company.

Ken Way brings over two decades of business growth experience in the semiconductor and systems space.

Biographies of Arteris management members, the world's most experienced semiconductor IP leadership team.

Raman K. Chitkara has served on the company’s board since January 2021.

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Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher performance, lower power, faster time to market, and better SoC economics.

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Arteris expands its third-party IP (3PIP) security assurance program with BAE Systems and SiFive, receiving an additional $3.3 million through the Trusted and Assured Microelectronics (T&AM) program. The funding supports hardware design supply chain security assurance for mission-critical aerospace and defense semiconductor systems.

Oct 2026 · GlobeNewswireNews article

Arteris extended its network-on-chip IP across multi-die chiplet designs for chiplet-based systems.

Sep 2026 · eeNews EuropeNews article

Arteris expands its solution with a new FlexGen Multi-Die product. The product addresses efficient data movement as the industry shifts to multi-die architectures, while preserving quality of service and architectural flexibility across chip boundaries.

Sep 2026 · GlobeNewswireNews article

Arteris appoints Saurabh Sinha as chief financial officer, effective September 8, 2026. Sinha will take over the CFO role on that date; the announcement provides no additional information about his background or responsibilities.

Aug 2026 · GlobeNewswireNews article