Credo

Credo’s SerDes and mixed-signal DSP IP powers MCM SoC and 2.5D interposer designs, delivering high-performance, low-power, and scalable 28G to 224G interconnects.

Credo microLED technology enables high-throughput AI data center connectivity up to 30m, delivering reliable, power-efficient, scalable bandwidth.

Credo OmniConnect uses 112G VSR SerDes and AXI framing to deliver scalable, low-latency AI interconnect, solving memory bottlenecks for advanced inference workloads.

Credo’s low-power optical DSPs enable 50G 1.6T PAM4 transceivers and active optical cables for cloud-scale data centers and AI networks.

Credo announced a family of PHY devices supporting IEEE 802.1AE MACsec and IPSec standards for 10G through 400G port interconnects.

New Low-Power AEC enables hitless failover between server and dual switches at cloud speed providing a migration path to next-generation 200G NICs and TORs

Credo announced it would demonstrate 112G PAM4 XSR SerDes IP technology at the TSMC 2019 OIP Forum and Technology Symposium in Amsterdam.

Credo announced it would demonstrate mixed-signal 112Gbps PAM4 SerDes developed on TSMC’s 7nm process at the TSMC 2018 Open Innovation Platform Ecosystem Forum in Nanjing, China.

Credo’s page features news, product innovations, and insights on high-speed connectivity for AI, cloud, and hyperscale networks.

Credo offers a way to contact an expert and inquire about high-speed connectivity solutions and innovations.

Credo delivers high-speed, energy-efficient connectivity solutions powering AI, cloud computing, and hyperscale networks up to 1.6T.

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