Siemens EDA›Siemens EDA› offers Questa Visualizer

Questa Visualizer is the debug and analysis environment in Siemens EDA's Questa verification offerings, providing waveform viewing for simulation results from Verilog, SystemVerilog, and VHDL designs. It correlates waveforms with source and testbench context for digital verification teams.

The environment supports debugging of UVM-based environments and SoC and FPGA programs, with tracing features that follow a signal's behaviour through a simulation run. It is licensed from Siemens EDA and runs on the customer's own compute alongside the Questa simulators.