A startup called PicoJool that’s backed by former Intel Corp. Chief Executive Pat Gelsinger says it’s ready to help ease the strain on artificial intelligence data centers after raising $27.5 million in early-stage funding today.
The Series A round was led by Socratic Partners and saw participation from Hudson River Trading. It brings the company’s total amount raised to $39.5 million. It follows an earlier $12 million seed funding round last November that was led by Gelsinger’s venture capital firm Playground Global.
PicoJool is trying to pioneer a technology called Vertical Cavity Surface Emitting Laser or VCSEL, which is a kind of semiconductor laser diode. It enables data to be sent via light signals through optical cables rather than traditional wire, enabling much faster data center communications. The startup, which has developed a number of optical chips and modules based on the technology, says they can drastically improve the performance and energy efficiency of large AI chip clusters.
There’s a growing appetite among data center operators for this kind of rapid and efficient connectivity. The more powerful AI models become, the bigger the clusters of graphics processing units and other accelerators are needed to run them. These days, the world’s largest enterprises operate clusters containing hundreds, sometimes even thousands of AI processors, which are constantly sending data packets back and forth to one another so they can work in unison to power AI workloads.
As a result, data centers are dealing with a tsunami of data, and it’s putting enormous strain on the traditional copper wire interconnects used to link all of those chips together. They simply cannot keep up with the bandwidth demands of the largest AI clusters, and they consume vast amounts of energy too, driving up the cost of running AI.
PicoJool founder and Chief Executive Al Yuen says his company can overcome this bottleneck by swapping out older interconnects for its high-speed 100G and 200G VCSEL products. It also offers low-power MicroVCSEL configurations including its 50G NRZ and 64G NRZ/PAM4 interconnects. According to PicoJool, the MicroVCSEL platform is based on a massively parallel architecture that aggregates bandwidth while dramatically reducing the energy costs of moving data around AI clusters. It provides a pathway for data center operators to achieve connectivity of up to 3.2 terabits per second of bandwidth.
“Reaching 200G per lane proved that the performance is there,” Yuen said. “Our focus is now execution. This funding allows us to expand our teams in the U.S. and Taiwan, qualify products with customers and move a complete portfolio from chip-level VCSELs and MicroVCSELs into AOC and NPO modules.”
PicoJool will also use some of the funds to accelerate its research and development efforts and grow its operations and sales teams, Yuen said. But the main focus now is on commercializing its existing technology. To do this, PicoJool is working with WIN Semiconductors Corp. and other chip foundries to prepare the 200G VCSEL for mass production, followed by its other products.
Gelsinger said he was attracted to PicoJool by its ambition and the fact it has a viable solution to the AI data center bandwidth bottleneck that has constrained AI deployments globally. “The network is the AI, and connectivity is becoming one of the defining constraints on performance,” he said. “The industry needs a solution that can increase bandwidth while sharply improving power and cost.”
